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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/Abd-El-BarrVZ91>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mostafa_I._H._Abd-El-Barr>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Safwat_G._Zaky>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zvonko_G._Vranesic>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F12.83641>
foaf:homepage <https://doi.org/10.1109/12.83641>
dc:identifier DBLP journals/tc/Abd-El-BarrVZ91 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F12.83641 (xsd:string)
dcterms:issued 1991 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label Algorithmic Synthesis of MVL Functions for CCD Implementation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mostafa_I._H._Abd-El-Barr>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Safwat_G._Zaky>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zvonko_G._Vranesic>
swrc:number 8 (xsd:string)
swrc:pages 977-986 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/Abd-El-BarrVZ91/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/Abd-El-BarrVZ91>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc40.html#Abd-El-BarrVZ91>
rdfs:seeAlso <https://doi.org/10.1109/12.83641>
dc:subject algorithmic synthesis; MVL functions; CCD implementation; sum of products; literals; charge-coupled devices; logic circuits; logic design; many-valued logics. (xsd:string)
dc:title Algorithmic Synthesis of MVL Functions for CCD Implementation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 40 (xsd:string)