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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/AlnuweiriK91>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hussein_M._Alnuweiri>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Viktor_K._Prasanna>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F12.67326>
foaf:homepage <https://doi.org/10.1109/12.67326>
dc:identifier DBLP journals/tc/AlnuweiriK91 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F12.67326 (xsd:string)
dcterms:issued 1991 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label Optimal VLSI Sorting with Reduced Number of Processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hussein_M._Alnuweiri>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Viktor_K._Prasanna>
swrc:number 1 (xsd:string)
swrc:pages 105-110 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/AlnuweiriK91/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/AlnuweiriK91>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc40.html#AlnuweiriK91>
rdfs:seeAlso <https://doi.org/10.1109/12.67326>
dc:subject optimal VLSI sorting; parallel architecture; parallel sorting time; sequential complexity; algorithm complexity; two-dimensional mesh array; trees organization; pyramid computer; computational complexity; parallel architectures; sorting; VLSI. (xsd:string)
dc:title Optimal VLSI Sorting with Reduced Number of Processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 40 (xsd:string)