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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/BanerjeeD89>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Abhijeet_Dugar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Prithviraj_Banerjee>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F12.8728>
foaf:homepage <https://doi.org/10.1109/12.8728>
dc:identifier DBLP journals/tc/BanerjeeD89 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F12.8728 (xsd:string)
dcterms:issued 1989 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label The Design, Analysis and Simulation of a Fault-Tolerant Interconnection Network Supporting the Fetch-and-Add Primitive. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Abhijeet_Dugar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Prithviraj_Banerjee>
swrc:number 1 (xsd:string)
swrc:pages 30-46 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/BanerjeeD89/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/BanerjeeD89>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc38.html#BanerjeeD89>
rdfs:seeAlso <https://doi.org/10.1109/12.8728>
dc:subject omega network; fault-tolerant interconnection network; fetch-and-add primitive; combining multistage interconnection network; 4*4 switches; four independent paths; scheduling; analytical models; network simulations; fault tolerant computing; multiprocessor interconnection networks. (xsd:string)
dc:title The Design, Analysis and Simulation of a Fault-Tolerant Interconnection Network Supporting the Fetch-and-Add Primitive. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 38 (xsd:string)