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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/BelkhaleB92>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Krishna_P._Belkhale>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Prithviraj_Banerjee>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F12.123383>
foaf:homepage <https://doi.org/10.1109/12.123383>
dc:identifier DBLP journals/tc/BelkhaleB92 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F12.123383 (xsd:string)
dcterms:issued 1992 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label Reconfiguration Strategies for VLSI Processor Arrays and Trees Using a Modified Diogenes Approach. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Krishna_P._Belkhale>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Prithviraj_Banerjee>
swrc:number 1 (xsd:string)
swrc:pages 83-96 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/BelkhaleB92/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/BelkhaleB92>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc41.html#BelkhaleB92>
rdfs:seeAlso <https://doi.org/10.1109/12.123383>
dc:subject reconfiguration strategies; VLSI processor arrays; trees; Diogenes approach; complete binary tree; rectangular arrays; circuit layout CAD; fault tolerant computing; trees (mathematics); VLSI. (xsd:string)
dc:title Reconfiguration Strategies for VLSI Processor Arrays and Trees Using a Modified Diogenes Approach. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 41 (xsd:string)