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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/BurnsG05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/James_Burns>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jean-Luc_Gaudiot>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTC.2005.16>
foaf:homepage <https://doi.org/10.1109/TC.2005.16>
dc:identifier DBLP journals/tc/BurnsG05 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTC.2005.16 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label Area and System Clock Effects on SMT/CMP Throughput. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/James_Burns>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jean-Luc_Gaudiot>
swrc:number 2 (xsd:string)
swrc:pages 141-152 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/BurnsG05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/BurnsG05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc54.html#BurnsG05>
rdfs:seeAlso <https://doi.org/10.1109/TC.2005.16>
dc:subject SMT, layout area estimation, processor architecture, microarchitecture trade off. (xsd:string)
dc:title Area and System Clock Effects on SMT/CMP Throughput. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 54 (xsd:string)