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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/DanyshT05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Albert_Danysh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dimitri_Tan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTC.2005.41>
foaf:homepage <https://doi.org/10.1109/TC.2005.41>
dc:identifier DBLP journals/tc/DanyshT05 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTC.2005.41 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label Architecture and Implementation of a Vector/SIMD Multiply-Accumulate Unit. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Albert_Danysh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dimitri_Tan>
swrc:number 3 (xsd:string)
swrc:pages 284-293 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/DanyshT05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/DanyshT05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc54.html#DanyshT05>
rdfs:seeAlso <https://doi.org/10.1109/TC.2005.41>
dc:subject Parallel, high-speed arithmetic, multimedia, data-path design, VLSI, MAC, multiply-accumulate, multiplier, vector, SIMD, Booth, Wallace, signed, unsigned, integer, fixed-point. (xsd:string)
dc:title Architecture and Implementation of a Vector/SIMD Multiply-Accumulate Unit. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 54 (xsd:string)