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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/DelaluzKVSI01>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anand_Sivasubramaniam>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mahmut_T._Kandemir>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mary_Jane_Irwin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Narayanan_Vijaykrishnan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Victor_Delaluz>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F12.966492>
foaf:homepage <https://doi.org/10.1109/12.966492>
dc:identifier DBLP journals/tc/DelaluzKVSI01 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F12.966492 (xsd:string)
dcterms:issued 2001 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label Hardware and Software Techniques for Controlling DRAM Power Modes. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anand_Sivasubramaniam>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mahmut_T._Kandemir>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mary_Jane_Irwin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Narayanan_Vijaykrishnan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Victor_Delaluz>
swrc:number 11 (xsd:string)
swrc:pages 1154-1173 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/DelaluzKVSI01/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/DelaluzKVSI01>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc50.html#DelaluzKVSI01>
rdfs:seeAlso <https://doi.org/10.1109/12.966492>
dc:subject Memory architecture, low power, low power compilation, software-directed energy management. (xsd:string)
dc:title Hardware and Software Techniques for Controlling DRAM Power Modes. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 50 (xsd:string)