Throughput Analysis of Cache-Based Multiprocessors with Multiple Buses.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tc/Dubois88
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/tc/Dubois88
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dc:
creator
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https://dblp.l3s.de/d2r/resource/authors/Michel_Dubois_0001
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foaf:
homepage
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http://dx.doi.org/doi.org%2F10.1109%2F12.75139
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DBLP journals/tc/Dubois88
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dc:
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DOI doi.org%2F10.1109%2F12.75139
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dcterms:
issued
1988
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swrc:
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rdfs:
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Throughput Analysis of Cache-Based Multiprocessors with Multiple Buses.
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foaf:
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https://dblp.l3s.de/d2r/resource/authors/Michel_Dubois_0001
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1
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swrc:
pages
58-70
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rdfs:
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dc:
subject
shared interleaved memory; cache-based multiprocessors; multiple buses; performance; general-purpose computing; multitasking; throughput; private cache; dynamic instruction mix statistics; buffer storage; multiprocessing systems; performance evaluation.
(xsd:string)
dc:
title
Throughput Analysis of Cache-Based Multiprocessors with Multiple Buses.
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37
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