On a Bit-Serial Input and Bit-Serial Output Multiplier.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tc/Gnanasekaran83
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dcterms:
bibliographicCitation
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http://dblp.uni-trier.de/rec/bibtex/journals/tc/Gnanasekaran83
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https://dblp.l3s.de/d2r/resource/authors/R._Gnanasekaran
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http://dx.doi.org/doi.org%2F10.1109%2FTC.1983.1676341
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DBLP journals/tc/Gnanasekaran83
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1983
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On a Bit-Serial Input and Bit-Serial Output Multiplier.
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https://dblp.l3s.de/d2r/resource/authors/R._Gnanasekaran
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9
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878-880
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dc:
subject
two's complement number representation, Add-shift multiplier, bit-sequential multiplier, carry-save addition, on-line multiplication
(xsd:string)
dc:
title
On a Bit-Serial Input and Bit-Serial Output Multiplier.
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32
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