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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/Gonzalez-ToralR18>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Juan_Antonio_Maestro>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pedro_Reviriego>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ricardo_Gonzalez-Toral>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhen_Gao_0005>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTC.2018.2792445>
foaf:homepage <https://doi.org/10.1109/TC.2018.2792445>
dc:identifier DBLP journals/tc/Gonzalez-ToralR18 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTC.2018.2792445 (xsd:string)
dcterms:issued 2018 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label A Scheme to Design Concurrent Error Detection Techniques for the Fast Fourier Transform Implemented in SRAM-Based FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Juan_Antonio_Maestro>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pedro_Reviriego>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ricardo_Gonzalez-Toral>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhen_Gao_0005>
swrc:number 7 (xsd:string)
swrc:pages 1039-1045 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/Gonzalez-ToralR18/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/Gonzalez-ToralR18>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc67.html#Gonzalez-ToralR18>
rdfs:seeAlso <https://doi.org/10.1109/TC.2018.2792445>
dc:title A Scheme to Design Concurrent Error Detection Techniques for the Fast Fourier Transform Implemented in SRAM-Based FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 67 (xsd:string)