An Analytical Model for Designing Memory Hierarchies.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tc/JacobCSM96
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dcterms:
bibliographicCitation
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http://dblp.uni-trier.de/rec/bibtex/journals/tc/JacobCSM96
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dc:
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https://dblp.l3s.de/d2r/resource/authors/Bruce_L._Jacob
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https://dblp.l3s.de/d2r/resource/authors/Peter_M._Chen
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https://dblp.l3s.de/d2r/resource/authors/Seth_R._Silverman
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https://dblp.l3s.de/d2r/resource/authors/Trevor_N._Mudge
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DBLP journals/tc/JacobCSM96
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DOI doi.org%2F10.1109%2F12.543711
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dcterms:
issued
1996
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swrc:
journal
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rdfs:
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An Analytical Model for Designing Memory Hierarchies.
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foaf:
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https://dblp.l3s.de/d2r/resource/authors/Bruce_L._Jacob
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https://dblp.l3s.de/d2r/resource/authors/Seth_R._Silverman
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swrc:
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10
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swrc:
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1180-1194
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dc:
subject
Cache, memory, and storage hierarchies; trace-driven simulations; optimization of cache configurations.
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dc:
title
An Analytical Model for Designing Memory Hierarchies.
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swrc:Article
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45
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