InTeRail: A Test Architecture for Core-Based SOCs.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tc/KagarisTK06
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DBLP journals/tc/KagarisTK06
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2006
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InTeRail: A Test Architecture for Core-Based SOCs.
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2
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swrc:
pages
137-149
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dc:
subject
System-on-chip test, cores, test access mechanism, design for testability.
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dc:
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InTeRail: A Test Architecture for Core-Based SOCs.
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55
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