Designing Optimum One-Level Carry-Skip Adders.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tc/Kantabutra93
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dcterms:
bibliographicCitation
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http://dblp.uni-trier.de/rec/bibtex/journals/tc/Kantabutra93
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dc:
creator
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https://dblp.l3s.de/d2r/resource/authors/Vitit_Kantabutra
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homepage
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http://dx.doi.org/doi.org%2F10.1109%2F12.277297
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DBLP journals/tc/Kantabutra93
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DOI doi.org%2F10.1109%2F12.277297
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issued
1993
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Designing Optimum One-Level Carry-Skip Adders.
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https://dblp.l3s.de/d2r/resource/authors/Vitit_Kantabutra
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6
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759-764
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dc:
subject
carry-skip adders; one-level; SPICE simulation; 64 bit; 1 micron; 6.23 ns; adders; digital simulation; logic design.
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dc:
title
Designing Optimum One-Level Carry-Skip Adders.
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42
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