Logic Networks of Carry-Save Adders.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tc/LaiM82
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dcterms:
bibliographicCitation
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http://dblp.uni-trier.de/rec/bibtex/journals/tc/LaiM82
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dc:
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https://dblp.l3s.de/d2r/resource/authors/Hung_Chi_Lai
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dc:
creator
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https://dblp.l3s.de/d2r/resource/authors/Saburo_Muroga
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foaf:
homepage
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http://dx.doi.org/doi.org%2F10.1109%2FTC.1982.1676102
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dc:
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DBLP journals/tc/LaiM82
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dc:
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DOI doi.org%2F10.1109%2FTC.1982.1676102
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dcterms:
issued
1982
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swrc:
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rdfs:
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Logic Networks of Carry-Save Adders.
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https://dblp.l3s.de/d2r/resource/authors/Hung_Chi_Lai
>
foaf:
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https://dblp.l3s.de/d2r/resource/authors/Saburo_Muroga
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swrc:
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9
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swrc:
pages
870-882
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rdfs:
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rdfs:
seeAlso
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https://doi.org/10.1109/TC.1982.1676102
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dc:
subject
parallel adder in double-rail input logic, Carry?save adders, full adders, input bundles, logic design, multipliers, multioperand adders, NAND gates, NOR gates, output bundles
(xsd:string)
dc:
title
Logic Networks of Carry-Save Adders.
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31
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