Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tc/LiP01
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/tc/LiP01
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Keqin_Li
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Victor_Y._Pan
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2F12.926164
>
foaf:
homepage
<
https://doi.org/10.1109/12.926164
>
dc:
identifier
DBLP journals/tc/LiP01
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2F12.926164
(xsd:string)
dcterms:
issued
2001
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/tc
>
rdfs:
label
Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Keqin_Li
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Victor_Y._Pan
>
swrc:
number
5
(xsd:string)
swrc:
pages
519-525
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/tc/LiP01/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/tc/LiP01
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/tc/tc50.html#LiP01
>
rdfs:
seeAlso
<
https://doi.org/10.1109/12.926164
>
dc:
subject
Bilinear algorithm, cost-optimality, distributed memory system, linear array, matrix multiplication, optical pipelined bus, PRAM, reconfigurable system, speedup.
(xsd:string)
dc:
title
Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
50
(xsd:string)