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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/LinRB01>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Doug_Burger>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Steven_K._Reinhardt>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wei-Fen_Lin>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F12.966495>
foaf:homepage <https://doi.org/10.1109/12.966495>
dc:identifier DBLP journals/tc/LinRB01 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F12.966495 (xsd:string)
dcterms:issued 2001 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label Designing a Modern Memory Hierarchy with Hardware Prefetching. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Doug_Burger>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Steven_K._Reinhardt>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wei-Fen_Lin>
swrc:number 11 (xsd:string)
swrc:pages 1202-1218 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/LinRB01/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/LinRB01>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc50.html#LinRB01>
rdfs:seeAlso <https://doi.org/10.1109/12.966495>
dc:subject Prefetching, caches, memory bandwidth, spatial locality, memory system design, Rambus DRAM. (xsd:string)
dc:title Designing a Modern Memory Hierarchy with Hardware Prefetching. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 50 (xsd:string)