Unified Architecture for Divide and Conquer Based Tridiagonal System Solvers.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tc/LopezZ94
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dcterms:
bibliographicCitation
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http://dblp.uni-trier.de/rec/bibtex/journals/tc/LopezZ94
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dc:
creator
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https://dblp.l3s.de/d2r/resource/authors/Emilio_L._Zapata
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dc:
creator
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https://dblp.l3s.de/d2r/resource/authors/Juan_L%E2%88%9A%E2%89%A5pez
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http://dx.doi.org/doi.org%2F10.1109%2F12.338101
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DBLP journals/tc/LopezZ94
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dc:
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DOI doi.org%2F10.1109%2F12.338101
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dcterms:
issued
1994
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swrc:
journal
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rdfs:
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Unified Architecture for Divide and Conquer Based Tridiagonal System Solvers.
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https://dblp.l3s.de/d2r/resource/authors/Emilio_L._Zapata
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https://dblp.l3s.de/d2r/resource/authors/Juan_L%E2%88%9A%E2%89%A5pez
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swrc:
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12
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swrc:
pages
1413-1425
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http://bibsonomy.org/uri/bibtexkey/journals/tc/LopezZ94/dblp
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rdfs:
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dc:
subject
parallel architectures; divide and conquer methods; unified architecture; divide and conquer based tridiagonal system solvers; unified parallel architecture; Successive Doubling; Recursive Doubling; Parallel Cyclic Reduction methods; systolic data flow; wired control section; constant geometry cyclic reduction architecture; VLSI.
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Unified Architecture for Divide and Conquer Based Tridiagonal System Solvers.
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43
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