Parallel Testing for Pattern-Sensitive Faults in Semiconductor Random-Access Memories.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tc/MazumderP89
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Parallel Testing for Pattern-Sensitive Faults in Semiconductor Random-Access Memories.
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parallel testing; pattern-sensitive faults; semiconductor random-access memories; design strategy; MOS; design-for-testability approach; reliability; linear complexity; integrated circuit testing; integrated memory circuits; MOS integrated circuits; random-access storage.
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Parallel Testing for Pattern-Sensitive Faults in Semiconductor Random-Access Memories.
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