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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/McKinneyG88>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Brian_C._McKinney>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fayez_El_Guibaly>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F12.2165>
foaf:homepage <https://doi.org/10.1109/12.2165>
dc:identifier DBLP journals/tc/McKinneyG88 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F12.2165 (xsd:string)
dcterms:issued 1988 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label A Multiple-Access Pipeline Architecture for Digital Signal Processing. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Brian_C._McKinney>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fayez_El_Guibaly>
swrc:number 3 (xsd:string)
swrc:pages 283-290 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/McKinneyG88/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/McKinneyG88>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc37.html#McKinneyG88>
rdfs:seeAlso <https://doi.org/10.1109/12.2165>
dc:subject multiple-access pipeline architecture; digital signal processing; CMOS processor; processing concurrency; microprogram control; floating-point data; arithmetic logic unit; computerised signal processing; digital arithmetic; parallel architectures. (xsd:string)
dc:title A Multiple-Access Pipeline Architecture for Digital Signal Processing. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 37 (xsd:string)