Synthesis of Gate-Minimum Multi-Output Two-Level Negative Gate Networks.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tc/Nakamura79
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/tc/Nakamura79
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dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Keijiro_Nakamura
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foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FTC.1979.1675244
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foaf:
homepage
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dc:
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DBLP journals/tc/Nakamura79
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dc:
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DOI doi.org%2F10.1109%2FTC.1979.1675244
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dcterms:
issued
1979
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swrc:
journal
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https://dblp.l3s.de/d2r/resource/journals/tc
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rdfs:
label
Synthesis of Gate-Minimum Multi-Output Two-Level Negative Gate Networks.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Keijiro_Nakamura
>
swrc:
number
10
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swrc:
pages
768-772
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http://bibsonomy.org/uri/bibtexkey/journals/tc/Nakamura79/dblp
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rdfs:
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http://dblp.uni-trier.de/db/journals/tc/tc28.html#Nakamura79
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rdfs:
seeAlso
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https://doi.org/10.1109/TC.1979.1675244
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dc:
subject
number of inversions, Gate-minimum network, inverse edge, MOS complex gate, negative function, negative gate
(xsd:string)
dc:
title
Synthesis of Gate-Minimum Multi-Output Two-Level Negative Gate Networks.
(xsd:string)
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type
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swrc:Article
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28
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