On the Use of Fully Specified Initial States for Testing of Synchronous Sequential Circuits.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tc/PomeranzR00a
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https://dblp.l3s.de/d2r/resource/authors/Sudhakar_M._Reddy
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http://dx.doi.org/doi.org%2F10.1109%2F12.833114
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2000
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On the Use of Fully Specified Initial States for Testing of Synchronous Sequential Circuits.
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175-181
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dc:
subject
Initial states, irredundant faults, synchronous sequential circuits, test generation, built-in test generation.
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title
On the Use of Fully Specified Initial States for Testing of Synchronous Sequential Circuits.
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49
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