Built-In Test Sequence Generation for Synchronous Sequential Circuits Based on Loading and Expansion of Input Sequences Using Single and Multiple Fault Detection Times.
Built-In Test Sequence Generation for Synchronous Sequential Circuits Based on Loading and Expansion of Input Sequences Using Single and Multiple Fault Detection Times.
(xsd:string)
Built-In Test Sequence Generation for Synchronous Sequential Circuits Based on Loading and Expansion of Input Sequences Using Single and Multiple Fault Detection Times.
(xsd:string)