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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/PomeranzR02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Irith_Pomeranz>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sudhakar_M._Reddy>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F12.995451>
foaf:homepage <https://doi.org/10.1109/12.995451>
dc:identifier DBLP journals/tc/PomeranzR02 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F12.995451 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label Built-In Test Sequence Generation for Synchronous Sequential Circuits Based on Loading and Expansion of Input Sequences Using Single and Multiple Fault Detection Times. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Irith_Pomeranz>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sudhakar_M._Reddy>
swrc:number 4 (xsd:string)
swrc:pages 409-419 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/PomeranzR02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/PomeranzR02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc51.html#PomeranzR02>
rdfs:seeAlso <https://doi.org/10.1109/12.995451>
dc:subject at-speed testing, built-in test generation, synchronous sequential circuits (xsd:string)
dc:title Built-In Test Sequence Generation for Synchronous Sequential Circuits Based on Loading and Expansion of Input Sequences Using Single and Multiple Fault Detection Times. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 51 (xsd:string)