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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/Sangireddy06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rama_Sangireddy>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTC.2006.88>
foaf:homepage <https://doi.org/10.1109/TC.2006.88>
dc:identifier DBLP journals/tc/Sangireddy06 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTC.2006.88 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label Reducing Rename Logic Complexity for High-Speed and Low-Power Front-End Architectures. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rama_Sangireddy>
swrc:number 6 (xsd:string)
swrc:pages 672-685 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/Sangireddy06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/Sangireddy06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc55.html#Sangireddy06>
rdfs:seeAlso <https://doi.org/10.1109/TC.2006.88>
dc:subject Wide-issue processors, integer pipeline, rename logic complexity, front-end power consumption. (xsd:string)
dc:title Reducing Rename Logic Complexity for High-Speed and Low-Power Front-End Architectures. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 55 (xsd:string)