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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/Sasao84>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tsutomu_Sasao>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTC.1984.1676349>
foaf:homepage <https://doi.org/10.1109/TC.1984.1676349>
dc:identifier DBLP journals/tc/Sasao84 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTC.1984.1676349 (xsd:string)
dcterms:issued 1984 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label Input Variable Assignment and Output Phase Optimization of PLA's. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tsutomu_Sasao>
swrc:number 10 (xsd:string)
swrc:pages 879-894 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/Sasao84/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/Sasao84>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc33.html#Sasao84>
rdfs:seeAlso <https://doi.org/10.1109/TC.1984.1676349>
dc:subject switching theory, Adder, complexity of logic circuits, decoder assignment, essential prime implicants, logic design, output phase optimization, programmable logic array (xsd:string)
dc:title Input Variable Assignment and Output Phase Optimization of PLA's. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 33 (xsd:string)