Generic Universal Switch Blocks.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tc/ShyuWCC00
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Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/tc/ShyuWCC00
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Guang-Ming_Wu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Michael_Shyu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yao-Wen_Chang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yu-Dong_Chang
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2F12.844347
>
foaf:
homepage
<
https://doi.org/10.1109/12.844347
>
dc:
identifier
DBLP journals/tc/ShyuWCC00
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2F12.844347
(xsd:string)
dcterms:
issued
2000
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/tc
>
rdfs:
label
Generic Universal Switch Blocks.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Guang-Ming_Wu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Michael_Shyu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yao-Wen_Chang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yu-Dong_Chang
>
swrc:
number
4
(xsd:string)
swrc:
pages
348-359
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/tc/ShyuWCC00/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/tc/ShyuWCC00
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/tc/tc49.html#ShyuWCC00
>
rdfs:
seeAlso
<
https://doi.org/10.1109/12.844347
>
dc:
subject
Analysis, architecture, design, digital, gate array, programmable logic array.
(xsd:string)
dc:
title
Generic Universal Switch Blocks.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
49
(xsd:string)