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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/TakagiYY85>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hiroto_Yasuura>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Naofumi_Takagi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shuzo_Yajima>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTC.1985.1676634>
foaf:homepage <https://doi.org/10.1109/TC.1985.1676634>
dc:identifier DBLP journals/tc/TakagiYY85 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTC.1985.1676634 (xsd:string)
dcterms:issued 1985 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label High-Speed VLSI Multiplication Algorithm with a Redundant Binary Addition Tree. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hiroto_Yasuura>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Naofumi_Takagi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shuzo_Yajima>
swrc:number 9 (xsd:string)
swrc:pages 789-796 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/TakagiYY85/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/TakagiYY85>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc34.html#TakagiYY85>
rdfs:seeAlso <https://doi.org/10.1109/TC.1985.1676634>
dc:subject VLSI, Arithmetic operations, binary integer multiplication, carry-propagation-free adder, hardware algorithm, high-speed multiplier, redundant binary representation, signed-digit number representation (xsd:string)
dc:title High-Speed VLSI Multiplication Algorithm with a Redundant Binary Addition Tree. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 34 (xsd:string)