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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/TirumalaiB91>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jon_T._Butler>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Parthasarathy_P._Tirumalai>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F12.73587>
foaf:homepage <https://doi.org/10.1109/12.73587>
dc:identifier DBLP journals/tc/TirumalaiB91 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F12.73587 (xsd:string)
dcterms:issued 1991 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label Minimization Algorithms for Multiple-Valued Programmable Logic Arrays. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jon_T._Butler>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Parthasarathy_P._Tirumalai>
swrc:number 2 (xsd:string)
swrc:pages 167-177 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/TirumalaiB91/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/TirumalaiB91>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc40.html#TirumalaiB91>
rdfs:seeAlso <https://doi.org/10.1109/12.73587>
dc:subject minimisation algorithms; multiple-valued programmable logic arrays; performance; heuristic algorithms; multiple-valued functions; charge-coupled device; CMOS; sum-of products; MIN operation; random-symmetric functions; tree search; backtracking; constrained implicant sets; charge-coupled device circuits; CMOS integrated circuits; logic arrays; many-valued logics; minimisation. (xsd:string)
dc:title Minimization Algorithms for Multiple-Valued Programmable Logic Arrays. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 40 (xsd:string)