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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tc/YoderJ89>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Leah_H._Jamieson>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mark_A._Yoder>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F12.29466>
foaf:homepage <https://doi.org/10.1109/12.29466>
dc:identifier DBLP journals/tc/YoderJ89 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F12.29466 (xsd:string)
dcterms:issued 1989 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tc>
rdfs:label Simulation of a Word Recognition System on Two Parallel Architectures. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Leah_H._Jamieson>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mark_A._Yoder>
swrc:number 9 (xsd:string)
swrc:pages 1269-1284 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tc/YoderJ89/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tc/YoderJ89>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tc/tc38.html#YoderJ89>
rdfs:seeAlso <https://doi.org/10.1109/12.29466>
dc:subject word recognition system; parallel architectures; SIMD; VLSI processor array; parallel algorithms; simulations; 8-MHz MC68000; 12-MHz Intel 8051; digital simulation; parallel algorithms; parallel architectures; speech recognition. (xsd:string)
dc:title Simulation of a Word Recognition System on Two Parallel Architectures. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 38 (xsd:string)