An Integrated Layout-Synthesis Approach for Analog ICs.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tcad/Castro-LopezGRF08
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Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/tcad/Castro-LopezGRF08
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Elisenda_Roca
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Francisco_V._Fern%E2%88%9A%C2%B0ndez_0001
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Oscar_Guerra
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Rafael_Castro-L%E2%88%9A%E2%89%A5pez
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FTCAD.2008.923417
>
foaf:
homepage
<
https://doi.org/10.1109/TCAD.2008.923417
>
dc:
identifier
DBLP journals/tcad/Castro-LopezGRF08
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FTCAD.2008.923417
(xsd:string)
dcterms:
issued
2008
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/tcad
>
rdfs:
label
An Integrated Layout-Synthesis Approach for Analog ICs.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Elisenda_Roca
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Francisco_V._Fern%E2%88%9A%C2%B0ndez_0001
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Oscar_Guerra
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Rafael_Castro-L%E2%88%9A%E2%89%A5pez
>
swrc:
number
7
(xsd:string)
swrc:
pages
1179-1189
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/tcad/Castro-LopezGRF08/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/tcad/Castro-LopezGRF08
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/tcad/tcad27.html#Castro-LopezGRF08
>
rdfs:
seeAlso
<
https://doi.org/10.1109/TCAD.2008.923417
>
dc:
title
An Integrated Layout-Synthesis Approach for Analog ICs.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
27
(xsd:string)