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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tcad/ChanakCS92>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kishore_Singhal>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rakesh_Chadha>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tom_Chanak>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F43.177400>
foaf:homepage <https://doi.org/10.1109/43.177400>
dc:identifier DBLP journals/tcad/ChanakCS92 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F43.177400 (xsd:string)
dcterms:issued 1992 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tcad>
rdfs:label Switched-capacitor simulation models for full-chips verification. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kishore_Singhal>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rakesh_Chadha>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tom_Chanak>
swrc:number 11 (xsd:string)
swrc:pages 1363-1371 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tcad/ChanakCS92/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tcad/ChanakCS92>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tcad/tcad11.html#ChanakCS92>
rdfs:seeAlso <https://doi.org/10.1109/43.177400>
dc:title Switched-capacitor simulation models for full-chips verification. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 11 (xsd:string)