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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tcad/ChengLLWH07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fei_Li_0003>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lei_He_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lerong_Cheng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Phoebe_Wong>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yan_Lin_0001>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTCAD.2006.888289>
foaf:homepage <https://doi.org/10.1109/TCAD.2006.888289>
dc:identifier DBLP journals/tcad/ChengLLWH07 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTCAD.2006.888289 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tcad>
rdfs:label Device and Architecture Cooptimization for FPGA Power Reduction. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fei_Li_0003>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lei_He_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lerong_Cheng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Phoebe_Wong>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yan_Lin_0001>
swrc:number 7 (xsd:string)
swrc:pages 1211-1221 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tcad/ChengLLWH07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tcad/ChengLLWH07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tcad/tcad26.html#ChengLLWH07>
rdfs:seeAlso <https://doi.org/10.1109/TCAD.2006.888289>
dc:title Device and Architecture Cooptimization for FPGA Power Reduction. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 26 (xsd:string)