A decoupling technique for efficient timing analysis of VLSI interconnects with dynamic circuit switching.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tcad/EoSES04
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A decoupling technique for efficient timing analysis of VLSI interconnects with dynamic circuit switching.
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A decoupling technique for efficient timing analysis of VLSI interconnects with dynamic circuit switching.
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