Modeling Latch-Up in CMOS Integrated Circuits. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

Property	Value
dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/journals/tcad/EstreichD82>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Donald_B._Estreich>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Robert_W._Dutton>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FTCAD.1982.1270006>
foaf:homepage	<https://doi.org/10.1109/TCAD.1982.1270006>
dc:identifier	DBLP journals/tcad/EstreichD82 (xsd:string)
dc:identifier	DOI doi.org%2F10.1109%2FTCAD.1982.1270006 (xsd:string)
dcterms:issued	1982 (xsd:gYear)
swrc:journal	<https://dblp.l3s.de/d2r/resource/journals/tcad>
rdfs:label	Modeling Latch-Up in CMOS Integrated Circuits. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Donald_B._Estreich>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Robert_W._Dutton>
swrc:number	4 (xsd:string)
swrc:pages	157-162 (xsd:string)
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/journals/tcad/EstreichD82/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/journals/tcad/EstreichD82>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/journals/tcad/tcad1.html#EstreichD82>
rdfs:seeAlso	<https://doi.org/10.1109/TCAD.1982.1270006>
dc:title	Modeling Latch-Up in CMOS Integrated Circuits. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:Article
rdf:type	foaf:Document
swrc:volume	1 (xsd:string)