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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tcad/HwangHLH90>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chi-Yi_Hwang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Youn-Long_Lin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yu-Chin_Hsu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yung-Chin_Hsieh>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F43.55207>
foaf:homepage <https://doi.org/10.1109/43.55207>
dc:identifier DBLP journals/tcad/HwangHLH90 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F43.55207 (xsd:string)
dcterms:issued 1990 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tcad>
rdfs:label A fast transistor-chaining algorithm for CMOS cell layout. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chi-Yi_Hwang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Youn-Long_Lin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yu-Chin_Hsu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yung-Chin_Hsieh>
swrc:number 7 (xsd:string)
swrc:pages 781-786 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tcad/HwangHLH90/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tcad/HwangHLH90>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tcad/tcad9.html#HwangHLH90>
rdfs:seeAlso <https://doi.org/10.1109/43.55207>
dc:title A fast transistor-chaining algorithm for CMOS cell layout. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 9 (xsd:string)