Table look-up model of thin-film transistors for circuit simulationusing spline interpolation with transformation by y=x+log(x).
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tcad/KimuraIS02
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Table look-up model of thin-film transistors for circuit simulationusing spline interpolation with transformation by y=x+log(x).
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Table look-up model of thin-film transistors for circuit simulationusing spline interpolation with transformation by y=x+log(x).
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