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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tcad/KoideWY96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Noriyoshi_Yoshida>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shin%27ichi_Wakabayashi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tetsushi_Koide>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F43.552091>
foaf:homepage <https://doi.org/10.1109/43.552091>
dc:identifier DBLP journals/tcad/KoideWY96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F43.552091 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tcad>
rdfs:label Pin assignment with global routing for VLSI building block layout. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Noriyoshi_Yoshida>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shin%27ichi_Wakabayashi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tetsushi_Koide>
swrc:number 12 (xsd:string)
swrc:pages 1575-1583 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tcad/KoideWY96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tcad/KoideWY96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tcad/tcad15.html#KoideWY96>
rdfs:seeAlso <https://doi.org/10.1109/43.552091>
dc:title Pin assignment with global routing for VLSI building block layout. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 15 (xsd:string)