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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tcad/MyersRM99>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chris_J._Myers>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Teresa_H.-Y._Meng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tomas_Rokicki>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F43.766727>
foaf:homepage <https://doi.org/10.1109/43.766727>
dc:identifier DBLP journals/tcad/MyersRM99 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F43.766727 (xsd:string)
dcterms:issued 1999 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tcad>
rdfs:label POSET timing and its application to the synthesis and verification of gate-level timed circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chris_J._Myers>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Teresa_H.-Y._Meng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tomas_Rokicki>
swrc:number 6 (xsd:string)
swrc:pages 769-786 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tcad/MyersRM99/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tcad/MyersRM99>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tcad/tcad18.html#MyersRM99>
rdfs:seeAlso <https://doi.org/10.1109/43.766727>
dc:title POSET timing and its application to the synthesis and verification of gate-level timed circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 18 (xsd:string)