BMSYN: Bus Matrix Communication Architecture Synthesis for MPSoC.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tcad/PasrichaDB07
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dcterms:
bibliographicCitation
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http://dblp.uni-trier.de/rec/bibtex/journals/tcad/PasrichaDB07
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dc:
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https://dblp.l3s.de/d2r/resource/authors/Mohamed_Ben-Romdhane
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https://dblp.l3s.de/d2r/resource/authors/Nikil_D._Dutt
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dc:
creator
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https://dblp.l3s.de/d2r/resource/authors/Sudeep_Pasricha
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foaf:
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DBLP journals/tcad/PasrichaDB07
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dcterms:
issued
2007
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swrc:
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https://dblp.l3s.de/d2r/resource/journals/tcad
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BMSYN: Bus Matrix Communication Architecture Synthesis for MPSoC.
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foaf:
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>
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swrc:
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8
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swrc:
pages
1454-1464
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owl:
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rdfs:
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http://dblp.uni-trier.de/db/journals/tcad/tcad26.html#PasrichaDB07
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BMSYN: Bus Matrix Communication Architecture Synthesis for MPSoC.
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