On determining symmetries in inputs of logic circuits. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Irith_Pomeranz>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Sudhakar_M._Reddy>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2F43.329273>
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dc:identifier	DBLP journals/tcad/PomeranzR94c (xsd:string)
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dcterms:issued	1994 (xsd:gYear)
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rdfs:label	On determining symmetries in inputs of logic circuits. (xsd:string)
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swrc:number	11 (xsd:string)
swrc:pages	1428-1434 (xsd:string)
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rdfs:seeAlso	<https://doi.org/10.1109/43.329273>
dc:title	On determining symmetries in inputs of logic circuits. (xsd:string)
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