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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tcad/PradhanS95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dhiraj_K._Pradhan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jayashree_Saxena>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F43.476587>
foaf:homepage <https://doi.org/10.1109/43.476587>
dc:identifier DBLP journals/tcad/PradhanS95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F43.476587 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tcad>
rdfs:label A novel scheme to reduce test application time in circuits with full scan. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dhiraj_K._Pradhan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jayashree_Saxena>
swrc:number 12 (xsd:string)
swrc:pages 1577-1586 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tcad/PradhanS95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tcad/PradhanS95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tcad/tcad14.html#PradhanS95>
rdfs:seeAlso <https://doi.org/10.1109/43.476587>
dc:title A novel scheme to reduce test application time in circuits with full scan. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 14 (xsd:string)