Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tcad/PullelaMP97
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1997
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Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets.
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Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets.
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