Stochastic Models for Wireability Analysis of Gate Arrays.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tcad/SastryP86
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/tcad/SastryP86
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Alice_C._Parker
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Sarma_Sastry
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FTCAD.1986.1270177
>
foaf:
homepage
<
https://doi.org/10.1109/TCAD.1986.1270177
>
dc:
identifier
DBLP journals/tcad/SastryP86
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FTCAD.1986.1270177
(xsd:string)
dcterms:
issued
1986
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/tcad
>
rdfs:
label
Stochastic Models for Wireability Analysis of Gate Arrays.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Alice_C._Parker
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Sarma_Sastry
>
swrc:
number
1
(xsd:string)
swrc:
pages
52-65
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/tcad/SastryP86/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/tcad/SastryP86
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/tcad/tcad5.html#SastryP86
>
rdfs:
seeAlso
<
https://doi.org/10.1109/TCAD.1986.1270177
>
dc:
title
Stochastic Models for Wireability Analysis of Gate Arrays.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
5
(xsd:string)