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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tcad/Schafer17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Benjamin_Carri%E2%88%9A%E2%89%A5n_Sch%E2%88%9A%C2%A7fer>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTCAD.2016.2550501>
foaf:homepage <https://doi.org/10.1109/TCAD.2016.2550501>
dc:identifier DBLP journals/tcad/Schafer17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTCAD.2016.2550501 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tcad>
rdfs:label Enabling High-Level Synthesis Resource Sharing Design Space Exploration in FPGAs Through Automatic Internal Bitwidth Adjustments. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Benjamin_Carri%E2%88%9A%E2%89%A5n_Sch%E2%88%9A%C2%A7fer>
swrc:number 1 (xsd:string)
swrc:pages 97-105 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tcad/Schafer17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tcad/Schafer17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tcad/tcad36.html#Schafer17>
rdfs:seeAlso <https://doi.org/10.1109/TCAD.2016.2550501>
dc:title Enabling High-Level Synthesis Resource Sharing Design Space Exploration in FPGAs Through Automatic Internal Bitwidth Adjustments. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 36 (xsd:string)