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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tcas/KrishnaDYBL10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chirn_Chye_Boon>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kiat_Seng_Yeo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Manh_Anh_Do>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Manthena_Vamshi_Krishna>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wei_Meng_Lim>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTCSI.2009.2016183>
foaf:homepage <https://doi.org/10.1109/TCSI.2009.2016183>
dc:identifier DBLP journals/tcas/KrishnaDYBL10 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTCSI.2009.2016183 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tcas>
rdfs:label Design and Analysis of Ultra Low Power True Single Phase Clock CMOS 2/3 Prescaler. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chirn_Chye_Boon>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kiat_Seng_Yeo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Manh_Anh_Do>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Manthena_Vamshi_Krishna>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wei_Meng_Lim>
swrc:number 1 (xsd:string)
swrc:pages 72-82 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tcas/KrishnaDYBL10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tcas/KrishnaDYBL10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tcas/tcasI57.html#KrishnaDYBL10>
rdfs:seeAlso <https://doi.org/10.1109/TCSI.2009.2016183>
dc:title Design and Analysis of Ultra Low Power True Single Phase Clock CMOS 2/3 Prescaler. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 57-I (xsd:string)