A 0.2-1.3 ns Range Delay-Control Scheme for a 25 Gb/s Data-Receiver Using a Replica Delay-Line-Based Delay-Locked-Loop in 45-nm CMOS.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tcas/RehmanKFCE20
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/tcas/RehmanKFCE20
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ali_Ferschischi
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Corrado_Carta
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Frank_Ellinger
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mohammad_Mahdi_Khafaji
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Sami_Ur_Rehman
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FTCSII.2020.2980813
>
foaf:
homepage
<
https://doi.org/10.1109/TCSII.2020.2980813
>
dc:
identifier
DBLP journals/tcas/RehmanKFCE20
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FTCSII.2020.2980813
(xsd:string)
dcterms:
issued
2020
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/tcas
>
rdfs:
label
A 0.2-1.3 ns Range Delay-Control Scheme for a 25 Gb/s Data-Receiver Using a Replica Delay-Line-Based Delay-Locked-Loop in 45-nm CMOS.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ali_Ferschischi
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Corrado_Carta
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Frank_Ellinger
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mohammad_Mahdi_Khafaji
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Sami_Ur_Rehman
>
swrc:
number
5
(xsd:string)
swrc:
pages
806-810
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/tcas/RehmanKFCE20/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/tcas/RehmanKFCE20
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/tcas/tcasII67.html#RehmanKFCE20
>
rdfs:
seeAlso
<
https://doi.org/10.1109/TCSII.2020.2980813
>
dc:
title
A 0.2-1.3 ns Range Delay-Control Scheme for a 25 Gb/s Data-Receiver Using a Replica Delay-Line-Based Delay-Locked-Loop in 45-nm CMOS.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
67-II
(xsd:string)