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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tcas/ShawonS20>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Md_Jubayer_Shawon>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vishal_Saxena>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTCSI.2020.2983303>
foaf:homepage <https://doi.org/10.1109/TCSI.2020.2983303>
dc:identifier DBLP journals/tcas/ShawonS20 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTCSI.2020.2983303 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tcas>
rdfs:label Rapid Simulation of Photonic Integrated Circuits Using Verilog-A Compact Models. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Md_Jubayer_Shawon>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vishal_Saxena>
swrc:number 10 (xsd:string)
swrc:pages 3331-3341 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tcas/ShawonS20/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tcas/ShawonS20>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tcas/tcasI67.html#ShawonS20>
rdfs:seeAlso <https://doi.org/10.1109/TCSI.2020.2983303>
dc:title Rapid Simulation of Photonic Integrated Circuits Using Verilog-A Compact Models. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 67-I (xsd:string)