A 40-nm Sub-Threshold 5T SRAM Bit Cell With Improved Read and Write Stability.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tcas/TemanMMF12
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A 40-nm Sub-Threshold 5T SRAM Bit Cell With Improved Read and Write Stability.
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A 40-nm Sub-Threshold 5T SRAM Bit Cell With Improved Read and Write Stability.
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