A Low-Latency FPGA Accelerator for YOLOv3-Tiny With Flexible Layerwise Mapping and Dataflow.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tcasI/KimOCSNL24
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Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/tcasI/KimOCSNL24
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hojin_Seo
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hyuk-Jae_Lee
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kyoungseok_Oh
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Minsik_Kim
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Xuan_Truong_Nguyen
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Youngmock_Cho
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FTCSI.2023.3335949
>
foaf:
homepage
<
https://doi.org/10.1109/TCSI.2023.3335949
>
dc:
identifier
DBLP journals/tcasI/KimOCSNL24
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FTCSI.2023.3335949
(xsd:string)
dcterms:
issued
2024
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/tcasI
>
rdfs:
label
A Low-Latency FPGA Accelerator for YOLOv3-Tiny With Flexible Layerwise Mapping and Dataflow.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hojin_Seo
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hyuk-Jae_Lee
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kyoungseok_Oh
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Minsik_Kim
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Xuan_Truong_Nguyen
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Youngmock_Cho
>
swrc:
month
March
(xsd:string)
swrc:
number
3
(xsd:string)
swrc:
pages
1158-1171
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/tcasI/KimOCSNL24/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/tcasI/KimOCSNL24
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/tcasI/tcasI71.html#KimOCSNL24
>
rdfs:
seeAlso
<
https://doi.org/10.1109/TCSI.2023.3335949
>
dc:
title
A Low-Latency FPGA Accelerator for YOLOv3-Tiny With Flexible Layerwise Mapping and Dataflow.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
71
(xsd:string)