Exploration of Ternary Logic Using T-CMOS for Circuit-Level Design.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tcasI/KoKJJS23
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Exploration of Ternary Logic Using T-CMOS for Circuit-Level Design.
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Exploration of Ternary Logic Using T-CMOS for Circuit-Level Design.
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