Circuit Modeling for RRAM-Based Neuromorphic Chip Crossbar Array With and Without Write-Verify Scheme.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tcasI/TaoMCGJATWLL21
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/tcasI/TaoMCGJATWLL21
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Aili_Wang_0002
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/En-Xiao_Liu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Erping_Li_0001
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hang_Jin
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hanzhi_Ma
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Manareldeen_Ahmed
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Quankun_Chen
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shurun_Tan
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Tuomin_Tao
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Zhe-Ming_Gu
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FTCSI.2021.3060798
>
foaf:
homepage
<
https://doi.org/10.1109/TCSI.2021.3060798
>
dc:
identifier
DBLP journals/tcasI/TaoMCGJATWLL21
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FTCSI.2021.3060798
(xsd:string)
dcterms:
issued
2021
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/tcasI
>
rdfs:
label
Circuit Modeling for RRAM-Based Neuromorphic Chip Crossbar Array With and Without Write-Verify Scheme.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Aili_Wang_0002
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/En-Xiao_Liu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Erping_Li_0001
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hang_Jin
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hanzhi_Ma
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Manareldeen_Ahmed
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Quankun_Chen
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shurun_Tan
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Tuomin_Tao
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Zhe-Ming_Gu
>
swrc:
number
5
(xsd:string)
swrc:
pages
1906-1916
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/tcasI/TaoMCGJATWLL21/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/tcasI/TaoMCGJATWLL21
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/tcasI/tcasI68.html#TaoMCGJATWLL21
>
rdfs:
seeAlso
<
https://doi.org/10.1109/TCSI.2021.3060798
>
dc:
title
Circuit Modeling for RRAM-Based Neuromorphic Chip Crossbar Array With and Without Write-Verify Scheme.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
68
(xsd:string)